15 #define SELECT() SPI_EnableSS_m(SPI_SS) 16 #define DESELECT() SPI_DisableSS_m(SPI_SS) 17 #define MMC_SEL SPI_StatSS_m(SPI_SS) 20 #define init_spi() SPI_Init() 21 #define dly_100us() _delay_us(100) 22 #define xmit_spi(d) SPI_WriteByte_m(d) 23 #define rcv_spi() SPI_ReadByte_i() 36 #define ACMD41 (0xC0+41) 38 #define CMD16 (0x40+16) 39 #define CMD17 (0x40+17) 40 #define CMD24 (0x40+24) 41 #define CMD55 (0x40+55) 42 #define CMD58 (0x40+58) 71 res = send_cmd(CMD55, 0);
72 if (res > 1)
return res;
83 xmit_spi((BYTE)(arg >> 24));
84 xmit_spi((BYTE)(arg >> 16));
85 xmit_spi((BYTE)(arg >> 8));
88 if (cmd == CMD0) n = 0x95;
89 if (cmd == CMD8) n = 0x87;
96 }
while ((res & 0x80) && --n);
114 DSTATUS disk_initialize (
void)
116 BYTE n, cmd, ty, ocr[4];
120 if (CardType && MMC_SEL) disk_writep(0, 0);
124 for (n = 10; n; n--){
129 if (send_cmd(CMD0, 0) == 1) {
130 if (send_cmd(CMD8, 0x1AA) == 1) {
131 for (n = 0; n < 4; n++) ocr[n] = rcv_spi();
132 if (ocr[2] == 0x01 && ocr[3] == 0xAA) {
133 for (tmr = 10000; tmr && send_cmd(ACMD41, 1UL << 30); tmr--) dly_100us();
134 if (tmr && send_cmd(CMD58, 0) == 0) {
135 for (n = 0; n < 4; n++) ocr[n] = rcv_spi();
136 ty = (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
140 if (send_cmd(ACMD41, 0) <= 1) {
141 ty = CT_SD1; cmd = ACMD41;
143 ty = CT_MMC; cmd = CMD1;
145 for (tmr = 10000; tmr && send_cmd(cmd, 0); tmr--) dly_100us();
146 if (!tmr || send_cmd(CMD16, 512) != 0)
154 return ty ? 0 : STA_NOINIT;
175 if (!(CardType & CT_BLOCK)) lba *= 512;
178 if (send_cmd(CMD17, lba) == 0) {
183 }
while (rc == 0xFF && --bc);
186 bc = 514 - ofs - cnt;
190 do rcv_spi();
while (--ofs);
205 do rcv_spi();
while (--bc);
224 DRESULT disk_writep (
244 if (!(CardType & CT_BLOCK)) sa *= 512;
245 if (send_cmd(CMD24, sa) == 0) {
246 xmit_spi(0xFF); xmit_spi(0xFE);
252 while (bc--) xmit_spi(0);
253 if ((rcv_spi() & 0x1F) == 0x05) {
254 for (bc = 5000; rcv_spi() != 0xFF && bc; bc--) dly_100us();
255 if (bc) res = RES_OK;